1. Field of the Invention
The present invention relates to a semiconductor device and a method for manufacturing the same.
2. Description of the Related Art
In recent years, an attempt to apply high breakdown voltage MOS transistors to on-vehicle applications has been made. In these applications, to achieve low-consumption power, not only lowering ON resistance while maintaining the high OFF breakdown voltage of 100 V class but also high resistivity to ESD surge is required.
FIG. 8 shows the structure of a traditional VDMOS (Vertical Double-diffused MOS) semiconductor device, which is a high breakdown voltage MOS transistor.
A semiconductor device 200 (VDMOS) includes a p-type semiconductor substrate 204, n+ impurity buried layer 206, n− drift regions 210, isolation insulating films 212, p body regions 214 and p well regions 218 formed in the drift regions 210, n+ source regions 216 formed in the p body regions 214, n+ drain extracting regions 220 formed in the sinkers 208, gate insulating films 224, and gate electrodes 222.
The drift regions 210 are constructed to have a low impurity concentration to acquire high breakdown voltage of the semiconductor device 200. On the other hand, the impurity buried layer 206, the sinkers 208, and the drain extracting regions 220 are constructed to have higher impurity concentrations than the drift regions 210 to lower ON resistance. The sinkers 208 and the drain extracting regions 220 function as drain regions. In this construction, as shown by the arrows in the drawing, a current between the source regions 216 and the drain extracting regions 220 flows via the impurity buried layers 206 and the sinkers 208.
The properties of a transistor thus constructed are generally by a breakdown voltage and ON resistance. The higher a breakdown voltage, and the lower an ON resistance, the properties are better. However, the both are in the relationship of tradeoff; usually, if the property of one is increased, the property of the other decreases.
In JP-A No. 303964/2003, technology intended to maintain breakdown voltage while lowering ON resistance is described. As shown in FIG. 9, according to JP-A No. 303964/2003, first and second epitaxial layers (23 and 24) are formed on the surface of a substrate 22, a dense first buried layer 31 is formed between the substrate 22 and the first epitaxial layer 23, and a less dense second buried layer 33 than the first buried layer 31 is formed between the first epitaxial layer 23 and the second epitaxial layer 24.
As described in JP-A No. 347546/2003, as shown in FIG. 10, a well region is formed to enclose the body regions 126 (corresponding to the body regions 214 of FIG. 8) and not contain the curbed portions 160 of the body regions of the outermost corner on which electric field concentrates. This intends to decrease ON resistance while maintaining breakdown voltage.
The present inventor has recognized as follows. As shown in FIG. 8, the partial concentration of an electric field is prone to occur in the inside end (gate bird's peak portion: A enclosed by the dashed line in the drawing) of the isolation insulating film 212 being a gate-drain separation oxide film. Therefore, breakdown is prone to occur in the location. When breakdown thus occurs in the substrate surface, ESD resistivity decreases and hot carrier characteristics decrease.
With the construction described in JP-A No. 303964/2003, as shown in FIG. 9, since the second buried layer 33 is formed to elongate to beneath the LOCOS edge, an electric field is prone to occur in the location, breakdown is prone to occur on the substrate surface. Still, this problem is not solved. Therefore, there is a problem in that resistivity to ESD surge cannot be acquired. As shown in the FIG. 9, the second buried layer 33 having a higher impurity concentration than the second epitaxial layer 24 contacts diffusion regions 36, 37, and 38 (corresponding to the body regions in FIG. 8). Therefore, increasing the impurity concentration of the second buried layer 33 to lower ON resistance decreases breakdown voltage and makes it impossible to significantly decrease ON resistance.
In the construction described in JP-A No. 347546/2003, as shown in FIG. 10, a well 110 having a higher impurity concentration than a drift region 106 contacts body regions (the body regions 214 of FIG. 8). Therefore, increasing of impurity concentration to decrease ON resistance decreases breakdown voltage, disabling a significant decrease in ON resistance. Furthermore, as shown in FIG. 10, the well 110 is not formed in connection with a buried layer 104, and a drift region 106 intervenes between them. Therefore, there is a problem in that the effect of decreasing ON resistance is low. Such a construction makes it impossible to acquire breakdown voltage of 100V class required in, for example, on-vehicle applications.